Job Code: SE / HDD / 00669
Job Location: Remote
Experience: 3 - 5 years
Role Overview
We are seeking a skilled Hardware Design Developer to leverage hardware design platforms to generate training data to enhance enterprise LLMs. This role offers a unique opportunity to contribute directly to the efficiency and intelligence of large-scale language models.
Key Responsibilities
- Utilize hardware design tools and platforms to support enterprise LLM training data generation.
- Collaborate with teams to refine workflows and ensure seamless hardware integrations.
- Apply verification and scripting expertise to streamline development processes.
Technical Requirements
- Core Skills: Proficiency in HDLs like Verilog, SystemVerilog, VHDL, and SystemC.
- Experience with front-end workflows, verification, and scripting.
- Familiarity with Synopsys/Cadence or open-source toolchains.
- Preferred Skills:
- UVM environments, Formal Verification, and Lint refinement processes.
- Expertise in ASIC, VLSI, FPGA, SOC, and SystemVerilog/Testbench development.
- Understanding of ML, AI systems, and assertion coding (SVA).
How to Apply
Send your updated resume to itjobs@sureevents.com with the subject line: Application for Hardware Design Developer.